Evaluation of SOC/FPGA architectures for payload data processing applications (m/f) à Toulouse

Airbus is a global leader in aeronautics, space and related services. In 2017, it generated revenues of € 67 billion and employed a workforce of around 130,000. Airbus offers the most comprehensive range of passenger airliners from 100 to more than 600 seats. Airbus is also a European leader providing tanker, combat, transport and mission aircraft, as well as Europe’s number one space enterprise and the world’s second largest space business. In helicopters, Airbus provides the most efficient civil and military rotorcraft solutions worldwide.

Our people work with passion and determination to make the world a more connected, safer and smarter place. Taking pride in our work, we draw on each other's expertise and experience to achieve excellence. Our diversity and teamwork culture propel us to accomplish the extraordinary - on the ground, in the sky and in space.

What if YOUR adventure started with US!
We offer you the opportunity to work in a world-leading company in its field, oriented towards digital technology, at the forefront of research and innovation.
A work-study offer in Evaluation of SOC/FPGA architectures for payload data processing applications (m/f) has just been opened within Airbus on our site where the internship is to take place.
The objective of this internship is to evaluate the latest generation of FPGA / SOC architectures in view of its use for future payload data processing applications. The evaluation will be conducted using signal and/or image processing algorithms based on the standard development kit provided by a FPGA vendor. The focus will be done on the exploration of the hardware/software partitioning.

This internship is to be filled from february (date subject to a certain flexibility)

You will be under the responsibility of a manager who will help you identify your professional objectives and support you in the development of your skills.

For that purpose, the trainee will have to:

• Integrate and test reference algorithms on real hardware (C/C++, VHDL, both)
• Benchmark algorithms (execution, accuracy, and power consumption)
• Evaluate the potential of vendor HW/SW tools
• Explore design trade-offs to increase the efficiency of algorithm implementations
• Write tutorial, user manual, and technical reports

This job requires an awareness of any potential compliance risks and a commitment to act with integrity, as the foundation for the Company’s success, reputation and sustainable growth.

Preparing a diploma Bac+5 level, you are looking for a 6-month internship to validate your diploma in Engineering / Electrotechnics, Hyperfrequency or a related discipline.

Required knowledge:

• FPGA, design flow (Altera, Xilinx),
• HDL languages (Verilog, VHDL),
• High level synthesis languages (SystemC)
• Embedded C/C++,
• GPU programming (CUDA, OpenCL),
• Real time systems, Linux OS

Soft skilsl desired example: You show commitment in your work
You are autonomous, show initiative and curiosity.

You have an advanced level in English and French.